As shown in FIG. 1, the use of pseudo-random noise (PRN) as a dither signal for enhancing linearity of an analog-to-digital converter (ADC) by diffusing non-linearities and discontinuities arising during signal conversion is well known. See, for example, the publication entitled "8 Bit A-D Converter Has 12 Bit Linearity" in Electronics, dated Sept. 11, 1980, at pp. 171-172. PRN is subtracted from the input analog signal at junction 44 after conversion by DAC 43. PRN is removed from the output of internal ADC 41 at junction 42. ADC 41 is a typical successive approximation ADC of the type shown in FIG. 2.
Referring to FIG. 2, ADC 41 comprises summer 20 for substracting signals from DAC 23 from the analog input, comparator 21 to determine if the output of summer 20 is above or below ground, Successive Approximation Logic (SAL) 22 and DAC 23. SAL 22 tries each bit of the DAC 23 in turn (successively), starting with the most significant. The most significant bit produces an analog output of V.sub.REF /2, the next bit V.sub.REF /4 and so on with each successive bit 1/2 the value of the previous bit. If the output of the DAC is greater than the analog input, SAL 22 resets this bit while setting the next bit. If the ouput of DAC 23 is less than the analog input, the bit is not reset. The conversion is complete when the last bit of DAC 23 is tested.
In order to add dither to the successive approximation ADC of FIG. 1, it was necessary to add DAC 43 to convert digital PRN from source 17 to an analog signal. DAC 23 of ADC 41 could not be used for such conversion because it can convert only one digital signal at a time. Therefore, if PRN is added, an uncorrectable conversion error would result.
In the general residue class ADC of FIG. 3, an analog input signal is converted to a digital word by successive "passes" or closer approximations. During the first-pass, ADC 62 converts the input signal from amplifier 61 to a few digital bits which are stored in latch 66. During the second-pass, DAC 14 converts the first-pass approximation back to an analog signal which is then subtracted (added negatively) from the input signal at junction 60. The difference left, or "residue", represents the error in the first-pass conversion. The gain of amplifier 61 is then increased, and the residue is converted to a few bits by ADC 62 and combined by adder 64 with the first-pass conversion to produce a much more accurate approximation of the input signal. Two or more passes, each of which producing any number of bits, can be performed. DAC 14 corresponds at least functionally to DAC 23 of ADC 41.
In a residue class ADC converter, each successive pass improves the linearity of the converter up to the accuracy limit of DAC 14. Thus, if the time allowed for conversion of the signal and the accuracy of DAC 14 permit, three or more passes may improve linearity even more.
In the present invention, PRN is introduced via the DAC already presented in a residue class ADC and may be introduced during either first or subsequent passes. For first-pass introduction, the analog signal is stored by a sample and hold circuit prior to first-pass digitization thereof. A sample value of PRN is introduced to the input of a DAC. The corresponding analog PRN is then subtracted from the sample and hold output and the result is digitized as the first approximation. The first approximation is then subtracted from the sample and hold output and the result of that subtraction, known as the residue, is again digitized by the ADC. Finally, this second-pass approximation is added to the first-pass approximation which was previously stored to produce a final output.
For subsequent-pass introduction, the first-pass digitization contains no PRN. PRN, instead, is added to the first-pass approximation to become the input to the DAC during the second-pass approximation. In both configurations, all of the dither is subtracted and only the digitized sample and hold output is present, with linearity enhanced by the presence of PRN during conversion.
The primary advantage of the first-pass PRN configuration is that the first approximation is more linear. The disadvantage, however, is that full-scale range of the first-pass is reduced, as is the case for previously published schemes. With the subsequent-pass PRN configuration of the present invention, however, the full-scale range of the total conversion is not reduced.